
ac68 processor core

License : MIT

Description language : Verilog

Simulation :
This core is simulated under Icarus Verilog.
Type
> iverilog -c ac68.lst
> vvp a.out
and you will get "ac68_tb.vcd".

Synthesis :
FPGA synthesis using Altera Quartus II Ver.8.0 SP2
leads to 2501LE's @ 35.60MHz.


