
ac6502 processor core

License : MIT

Description language : Verilog

Simulation :
This core is simulated under Icarus Verilog.
Type
> iverilog -c ac6502.lst
> vvp a.out
and you will get "ac6502_tb.vcd".

Synthesis :
FPGA synthesis using Altera Quartus II Ver.8.0 SP1
leads to 1699LE's @ 40.41MHz.


