
ac09 processor core

License : MIT

Description language : Verilog

Simulation :
This core is simulated under Icarus Verilog.
Type
> iverilog -c ac09.lst
> vvp a.out
and you will get "ac09_tb.vcd".

Synthesis :
FPGA synthesis using Altera Quartus II Ver.8.0 SP1
leads to 3126LE's @ 35.95MHz.


